Welcome to VHDLogic.org

The goal of this site is to present complete and open resources for electronic circuit design written in VHDL and to encourage the design community to contribute. Unlike sites sponsored by PLD vendors, our approach is to keep the design efforts  “Vendor Agnostic” rather than target a specific manufacturer or programmable device family. While all projects will be device proven, the specifics of implementation will be left up to the end user. Although we encourage all input related to specific device implementation, the core source must be device and technology independent.

As an end user:

Feel free to download and implement any of the VHDL source modules presented on this site. Should you have success, or problems, you are welcome to revisit this site and post your experiences – and seek advice from others who have used the modules, perhaps in a different PLD technology.

As a contributor:

You may contribute by simply logging in and joining others in discussing techniques, implementation strategies,  code improvements, device attributes etc. Also, should you have source code that you can contribute freely, please do so. We will publish a simple set of guidelines for doing so very shortly.

Please feel encouraged to join this effort whether you are new to programmable logic, or a seasoned veteran.